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(Peer-Reviewed) An artificial neural network chip based on two-dimensional semiconductor
Shunli Ma 马顺利 ¹, Tianxiang Wu 吴天祥 ¹, Xinyu Chen 陈新宇 ¹, Yin Wang 王印 ¹, Hongwei Tang 唐宏伟 ¹, Yuting Yao ¹, Yan Wang ¹, Ziyang Zhu ², Jianan Deng 邓嘉男 ², Jing Wan 万景 ², Ye Lu 陆叶 ², Zhengzong Sun 孙正宗 ¹, Zihan Xu 许子寒 ³, Antoine Riaud ¹, Chenjian Wu 吴晨健 ⁴, David Wei Zhang 张卫 ¹, Yang Chai 柴扬 ⁵, Peng Zhou 周鹏 ¹, Junyan Ren 任俊彦 ¹, Wenzhong Bao 包文中 ¹
¹ State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China
中国 上海 复旦大学微电子学院 专用集成电路与系统国家重点实验室
² State Key Laboratory of ASIC and System, School of Information Science and Technology, Fudan University, Shanghai 200433, China
中国 上海 复旦大学信息科学与工程学院 专用集成电路与系统国家重点实验室
³ Shenzhen Sixcarbon Technology, Shenzhen 518106, China
中国 深圳 深圳六碳科技有限公司
⁴ School of Electronic and Information Engineering, Soochow University, Suzhou 215006, China
中国 苏州 苏州大学电子信息学院
⁵ Department of Applied Physics, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong, China
中国 香港 九龙红磡 香港理工大学应用物理系
Science Bulletin , 2021-10-05
Abstract

Recently, research on two-dimensional (2D) semiconductors has begun to translate from the fundamental investigation into rudimentary functional circuits. In this work, we unveil the first functional MoS₂ artificial neural network (ANN) chip, including multiply-and-accumulate (MAC), memory and activation function circuits.

Such MoS₂ ANN chip is realized through fabricating 818 field-effect transistors (FETs) on a wafer-scale and high-homogeneity MoS₂ film, with a gate-last process to realize top gate structured FETs. A 62-level simulation program with integrated circuit emphasis (SPICE) model is utilized to design and optimize our analog ANN circuit.

To demonstrate a practical application, a tactile digit sensing recognition was demonstrated based on our ANN circuits. After training, the digit recognition rate exceeds 97%. Our work not only demonstrates the protentional of 2D semiconductors in wafer-scale integrated circuits, but also paves the way for its future application in AI computation.
An artificial neural network chip based on two-dimensional semiconductor_1
An artificial neural network chip based on two-dimensional semiconductor_2
An artificial neural network chip based on two-dimensional semiconductor_3
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